[rwolf]

http://www.freshpatents.com/Method-a...0060051912.php

A stacked die configuration for use in an IC package includes a first IC die mechanically coupled to a substrate material. Mechanically coupled to the first IC die is an interposer having an aperture adapted to receive a second IC die. Mechanically coupled to the first IC die and fitting within the aperture of the interposer is a second IC die. As a result, both the overall height of the IC package and the length of the bond wires connecting each of the members of the stacked die configuration may be reduced.

Anybody know if this sounds like R600 or is this Xbox related? Multiple dies within the same package.

[Rys]

Originally Posted by rwolf

http://www.freshpatents.com/Display-...0060055701.php
Vista requirement / crossfire or something else?

Just seems like a possible minor update to their usual screen tiling approach to rendering.

[Shtal]

After success with R300; ATI was working next big step R400 but then later it was cancel with later design of R500 - I believe" which became available to Xbox360. But instead they improved R300 and made R420.

I believe R520/R580 is just simplify apposite world direction of R500 for Xbox360. But R600 instead should be based of R500 for Xbox360 - but improved and design towards different approach in PC based system world.

Second: ATI will not make same mistake twice as example with R520 based 90nm jump. It would be unwise for R600 to follow same error steps and jump directly to 65nm right now (I don't think they could) it make sense to stay with more mature 90nm but slightly move to 80nm which is not that danger.

ATI made some money with Xbox360; so now ATI is free and can spend more time and sources availability to improve R500.

Whatever the reason R600 is delay after G80, it means it is more advance then G80 or ATI has screw-up with R600.

[rwolf]

Originally Posted by Shtal

Whatever the reason R600 is delay after G80, it means it is more advance then G80 or ATI has screw-up with R600.

Or their manufacturing cycle is diffent then Nvidia's.

[rwolf]

Originally Posted by Rys

Just seems like a possible minor update to their usual screen tiling approach to rendering.

Perhaps but this feature caught my eye....

...predicated rendering....

So that leads me to believe this is R600 and DX10. Looks more like the ability to render different application windows.

[Jawed]

Originally Posted by rwolf

So that leads me to believe this is R600 and DX10. Looks more like the ability to render different application windows.

Agreed. Only the CPU can identify regions of the screen at the time a packet of work is created and a windowing system is the most likely scenario in which screen regions are known in advance.

Jawed

[Xmas]

Originally Posted by rwolf

http://www.freshpatents.com/Display-...0060055701.php
Vista requirement / crossfire or something else?

Sounds like Xenos predicated tile rendering for AA to me.

[Arun]

I moved the posts regarding speculations of AMD quitting the high-end market in the 3D Industry forum, same thread that already existed on the subject. Hopefully this thread will remain relatively active even without that, we don't want to be seen as a NVIDIA fan forum, damnit!


Uttar

[trinibwoy]

Well given that it's an R600 thread maybe we could do with some more R600 rumours

[Chalnoth]

Originally Posted by Uttar

I moved the posts regarding speculations of AMD quitting the high-end market in the 3D Industry forum, same thread that already existed on the subject. Hopefully this thread will remain relatively active even without that, we don't want to be seen as a NVIDIA fan forum, damnit!

Well, the R600 is still quite a ways off. I'm sure the R600 rumors will pick up when it's closer to release

[Albuquerque]

It'll come with a billion transistors operating at 1ghz, a gig of GDDR4 ram at 2ghz, can raster 32 billion pixels per second and can calculate 128 billion 16bit floating point ops per second or 256 billion 16bit integer ops per second.

Requires a one kilowatt powersupply minimum and exhales something around 15,000 BTU's...



I have no clue, I just wanted to nudge the thread a bit...

[rwolf]

http://patft1.uspto.gov/netacgi/nph-...S=PN/7,123,266

Method and apparatus for a video graphics circuit having parallel pixel processing

Generally, the present invention provides a method and apparatus for parallel processing of pixel information within a video graphics circuit. This may be accomplished when the video graphics circuit includes a set-up engine, an edgewalker circuit, a span processing circuit, and a plurality of pixel circuits. In such an embodiment, the set-up engine receives vertex information and produces object-element information therefrom. The object-element information is provided to the edgewalker circuit, which in turn produces span definition information. The span definition information identifies the starting pixel of a span and the starting pixel parameters. The span information is received by the processing circuit and converted into a plurality of pixel processing circuits wherein each of pixel parameters are provided to the plurality of pixel processing circuits wherein each of the plurality of pixel processing circuits processes corresponding pixel parameters to produce pixel information in accordance with the information provided by the processing circuit. With such a method and apparatus, the benefits of parallel processing are achieved in a video graphics circuit without the requirement of doubling, or near doubling, the hardware requirements and without the additional circuitry to track the efficiency and validity of the information being processed.

Looks like the setup engine has been beefed in order to feed the gpu all the vertex information.

[Razor1]

hmm interesting find, but this is an old patent , well it could be still for the r600.

[rwolf]

Your right. I was checking the date in the top right corner. Applied for two years before the unified shader patent. I doubt this is R600 related. Weird that it was posted so recently.

[Razor1]

well black box patents aren't released to general public until a certain date, maybe ATi felt they had use a black box patent or the attorney that filled it felt it was necessary, they always look for extra money any which way .

I think they are called black box, our attroney tried to do that for some of our engine code, which we meekly turned down lol, strong believer in can't patent math.

[rwolf]

http://www.theinquirer.net/default.aspx?article=35483

Nvidia has a really strong line-up for upcoming Yuletide shopping madness. However, within the ranks of Graphzilla's troopers there is an obvious intent to bury all of the more advanced features that the competition will offer in couple of months' time. 512-bit memory interface, more pixels per clock, second gen RingBus marchitecture... all this is hidden in the dungeons of Markham and DAAMIT's R&D Labs in Santa Clara and Marlboro.

So more then 24 ROPS?

[Razor1]

Heh, gotta love the inq, they are so vague they can almost mean anything , shameless!

[INKster]

Man, i wish this 512bit external bus "thingy" would just go away, it just doesn't make any sense right now.
Out of the blue, ATI would pair an advanced architecture with brute-force methods ? It's not their style.
And what about PCB complexity ?

I can't picture a 80nm/65nm GPU surrounded by all sides with memory chips, especially of the top GDDR4 kind.
G80's -90nm, therefore, a large chip- PCB is already insanely complex, and the only side without memory chips (and is "only" GDDR3) is the bottom one, where the PCI-Express lanes lead to the connector.

Is that much memory bandwidth really needed at this point ?

[Razor1]

Originally Posted by INKster

Man, i wish this 512bit external bus "thingy" would just go away, it just doesn't make any sense right now.
Out of the blue, ATI would pair an advanced architecture with brute-force methods ? It's not their style.
And what about PCB complexity ?

I can't picture a 80nm/65nm GPU surrounded by all sides with memory chips, especially of the top GDDR4 kind.
G80's -90nm, therefore, a large chip- PCB is already insanely complex, and the only side without memory chips (and is "only" GDDR3) is the bottom one, where the PCI-Express lanes lead to the connector.

Is that much memory bandwidth really needed at this point ?

If ATi is using gddr4 with a 512 bit bus, thats like what 160Gb/sec bandwidth? The r600 better be 3 or more times faster then the r580 to utilize that much bandwidth........

Its just doesn't make any sense to go with a 512 bit bus.

[Rangers]

Originally Posted by Razor1

If ATi is using gddr4 with a 512 bit bus, thats like what 160Gb/sec bandwidth? The r600 better be 3 or more times faster then the r580 to utilize that much bandwidth........

Its just doesn't make any sense to go with a 512 bit bus.

You could probably get 2X performance out of R580 just by un-texture limiting it (it's sitting on fourty eight pixel shader pipes after all).

So yeah, easily possible.

[Razor1]

Originally Posted by Rangers

You could probably get 2X performance out of R580 just by un-texture limiting it (it's sitting on fourty eight pixel shader pipes after all).

So yeah, easily possible.

nah maybe 50% more but thats about it.

[trinibwoy]

Originally Posted by Rangers

You could probably get 2X performance out of R580 just by un-texture limiting it (it's sitting on fourty eight pixel shader pipes after all).

So yeah, easily possible.

2X? Uh, no. That would imply that the ALU's are spending half their time spinning their wheels waiting on texture reads.

[Rangers]

Originally Posted by trinibwoy

2X? Uh, no. That would imply that the ALU's are spending half their time spinning their wheels waiting on texture reads.

Who says they aren't?

Websites have done ATI R520 pipe vs Nvidia G71 pipe clocked the same before, and they come out within 10-20% of each other. You're right, it might not be double, but it might be 1.6-1.8X

[trinibwoy]

Originally Posted by Rangers

Who says they aren't?

Websites have done ATI R520 pipe vs Nvidia G71 pipe clocked the same before, and they come out within 10-20% of each other. You're right, it might not be double, but it might be 1.6-1.8X

G71 pipe = R520 pipe ? Let me put it this way, do you think ATi would come up with a design where most of their functional units are 50% utilized on average?

[Rangers]

Originally Posted by trinibwoy

G71 pipe = R520 pipe ? Let me put it this way, do you think ATi would come up with a design where most of their functional units are 50% utilized on average?

Well, they did.

Did you read the link? They downclocked a R520, disabled a quad on G71 and compared pipe for pipe clock for clock. ATI lost but not by much. Disregard the opengl game imo. The DX9 and synthetic tests they did well. You could look at a X1800GTO vs 7600GT for more proof.

ATI surely bet on the 3:1 ratio and/or had no choice.

I do agree though, that it's probably more like 60-70% utilized, and they hoped for more shader intensive games to get even more. It was the only way for them to scale easily, apparantly. Sure, tripling the shader units might only gain them 5-10% over just doubling them, but it didn't take a ton of die area so they probably figured they might as well. For some reason apparantly they couldn't scale the texture units. And or apparantly there is something that limits them to either 1:1 or 3:1.

Anyways I guess this is OT. I sure hope they learned a lesson and R600 has about 64 TMU's though, like INQ's hint of "64 true pipes". It seems now that Nvidia has gone to dedicated texture units, they are surely making sure it does not limit them (64 in G80 according to inq?)