[Shtal]

Originally Posted by Bouncing Zabaglione Bros.

ATI is pretty limited at this point with regards to making changes to combat G80. It's not like they can suddenly throw in another 48 unified shaders or anything more significant in the chip. They might be able to fiddle with the clocks, or throw massive amounts of money away by having only high yielding products in their range (ie having a product range that consists of the higher specced bins), but I doubt that will happen.

I remember the days when R420 as oring suppose to be 12 pipeline, but since NV40 was 16 pipeline then ATi squeze extra 4 pipeline to make 16 also.

[Jawed]

Well ATI did knock up R420 by bolting two R350s together and adding 3Dc and some twiddly bits

http://www.beyond3d.com/forum/showpo...01&postcount=2

Jawed

[Razor1]

Originally Posted by Shtal

I remember the days when R420 as oring suppose to be 12 pipeline, but since NV40 was 16 pipeline then ATi squeze extra 4 pipeline to make 16 also.

This was already planned for, well was it planned for or were they redunent pipes for yeild reason, and for the refresh they could have gotten the full 16 pipes out with no problem at all.

[INKster]

Originally Posted by Jawed

Well ATI did knock up R420 by bolting two R350s together and adding 3Dc and some twiddly bits

http://www.beyond3d.com/forum/showpo...01&postcount=2

Jawed

One thing is designing 2 x "more of the same".
Another is waiting for the manufacturing process/cost to catch up (not to mention taming power consumption/heat to acceptable levels)...

[Razor1]

Originally Posted by INKster

One thing is designing 2 x "more of the same".
Another is waiting for the manufacturing process/cost to catch up (not to mention taming power consumption/heat to acceptable levels)...

Well it all depends if ATi planned for it in advance they possibly can make something that demolishes the g80, they must have learned something from the past (gf6 with 16 pipes, gf7 with its super drivers and to a lesser extent the 7800 gtx 512, nV seems to always have something ready just in case)

[Dave Baumann]

So, they have a CPU ready?

[Jawed]

Damn, that's evil.

Jawed

[Razor1]

Originally Posted by Dave Baumann

So, they have a CPU ready?

LOL its gotta be a GPU/CPU hybrid nV won't stop in the middle

[INKster]

Originally Posted by Dave Baumann

So, they have a CPU ready?

Maybe they can continue to inflate their stock... and then buy AMD in a few years.
It's not like the difference is that big right now.

[Arty]

Originally Posted by INKster

Maybe they can continue to inflate their stock... and then buy AMD in a few years.
It's not like the difference is that big right now.

Dream on!

[INKster]

Originally Posted by serenity

Dream on!

12 months ago AMD was also dreaming with buying ATI, and then look what happened.
Jen Hsun is a good friend of Goldman Sachs', maybe they can loan them the money, the same way AMD had half of ATI on a loan by Morgan Stanley Senior Funding.

[Arty]

Originally Posted by INKster

12 months ago AMD was also dreaming with buying ATI, and then look what happened. Jen Hsun is a good friend of Goldman Sachs', maybe they can loan them the money, the same way AMD had half of ATI on a loan by Morgan Stanley Senior Funding.

AMD needed ATI, its no compulsion for Nvidia to join the merger or buyout race. They are mighty fine on their own.

Back on topic at hand, has anybody approximated the die size of Xenos? Also Dave noted this in his Xenos article:

When we factor in the savings for both power and die size savings we can see that this potentially has some advantages over traditional architectures. In the case of the XBOX 360 not only does this result in a relatively smaller die size for a fairly high performance ratio but also means that the graphics need only be air cooled, without the use of its own additional fan. Beyond the immediate application we can see that unified designs that are bound for the PC could have smaller die sizes for equivalent performances as current discrete solutions or more silicon dedicated to either more ALU's for higher performance, or other transistors dedicated to other functionality.

[Shtal]

Originally Posted by Razor1

This was already planned for, well was it planned for or were they redunent pipes for yeild reason, and for the refresh they could have gotten the full 16 pipes out with no problem at all.

Before we talk; we do not have exact truth about G80 until Nov 8, 2006, when Nvidia will introduce G80. After that only ATI will know if their chip R600; how well its going to compete: But we can only guess.

[Arun]

I moved the majority of the CPU/GPU talk into its own thread. So please continue discussing R600 (and/or R6xx!) here instead, mkay?


Uttar

[Razor1]

Originally Posted by Shtal

Before we talk; we do not have exact truth about G80 until Nov 8, 2006, when Nvidia will introduce G80. After that only ATI will know if their chip R600; how well its going to compete: But we can only guess.

Sure about the g80? .

True only ATi knows what the r600 has right now, but if the r600 is performing lower then the g80 as it stands ATi will try to up the clocks and us faster memory to edge out the g80, if the r600 is already faster, well then no changes. Either way it will probably end up close or a slight win for ATi. Well unless the r600 has major issues.

[Chalnoth]

Why should the R600 pull ahead? nVidia might just themselves release a new high-end version soon after if ATI pulls ahead just with a clockspeed bump.

[Razor1]

It depends, ATi, if they plan for a speed bump from nV now has a small advantage of coming out after, but then again, we don't know if nV has already made plans for a 80 nm g80. Its all down to business tactics which we don't and won't have a clear understanding and how it will be played out until around the time the r600 is scheduled to be released.

[Chalnoth]

The G80 architecture is sure to last a good two to three years. So they may or may not skip 80nm. But does that really matter? I think we've learned that it seems that today it's overall design that is more important than manufacturing process. Using a more advanced manufacturing process can help, in that it typically will allow for better power consumption, or it can hurt, in that new manufacturing processes typically take some time to get yields to the point where they overtake older manufacturing processes for large dies. At best, using 80nm is going to be a minor influence on the performance of the R600.

[Razor1]

true!

[vertex_shader]

Originally Posted by Chalnoth

Why should the R600 pull ahead? nVidia might just themselves release a new high-end version soon after if ATI pulls ahead just with a clockspeed bump.

Golden classics again....

I see this the topic future:
"r600 coming only in april" "r600 hot and long" "r600 yield 8%" "r600 20% slower than g80" "when r600 coming in january, nv already release a 8800 ultra" "r600 die huge, this is kill ATi margins" "r600 = nv30" "r600 need 600watt psu, r600 cf need 900watt psu"

[rwolf]

Originally Posted by Chalnoth

Why should the R600 pull ahead? nVidia might just themselves release a new high-end version soon after if ATI pulls ahead just with a clockspeed bump.

I wonder how soon they can be ready with a redesign in order to keep up with R600. It is a good thing they will have a bit of a lead because otherwise how would they compete. Perhaps they have tricks up their sleeve and can put two 8800 GPUs on a card to compete with R600.

[DudeMiester]

Originally Posted by vertex_shader

Golden classics again....

I see this the topic future:
"r600 coming only in april" "r600 hot and long" "r600 yield 8%" "r600 20% slower than g80" "when r600 coming in january, nv already release a 8800 ultra" "r600 die huge, this is kill ATi margins" "r600 = nv30" "r600 need 600watt psu, r600 cf need 900watt psu"

Just no.

[Chalnoth]

Originally Posted by rwolf

I wonder how soon they can be ready with a redesign in order to keep up with R600. It is a good thing they will have a bit of a lead because otherwise how would they compete. Perhaps they have tricks up their sleeve and can put two 8800 GPUs on a card to compete with R600.

Well, I wasn't suggesting that. Just that if the R600 only pulls ahead because ATI sacrifices on yields compared to what they were originally planning to do, releasing a product with higher clockspeeds, then nVidia could do the same right back.

The real differentiator is going to be the particular architectural design choices each company made some time ago. And as far as that is concerned, we're going to have to see which one pulls ahead. If the rumors are correct, it certainly seems like nVidia has done something very radical with the G80 design. What is the R600 going to be like? It will be a very interesting comparison, I think.

[rwolf]

http://www.freshpatents.com/Display-...0060055701.php

A method and apparatus for providing rendering of subsections of screen space receives render commands associated with different screen subsections, such as from a command buffer populated by a coprocessor, and determines which screen section is currently being rendered by a rendering engine, or stated another way, which screen section the host processor wishes to have rendered, and evaluates screen subsection data that is associated with a received rendering command. The screen subsection data identifies a screen subsection for which the command refers. The method includes executing the command if it is determined that the command refers to a current screen section being rendered.

Vista requirement / crossfire or something else?

[rwolf]

http://www.freshpatents.com/Apparatu...0060053188.php

An apparatus with circuit redundancy includes a set of parallel arithmetic logic units (ALUs), a redundant parallel ALU, input data shifting logic that is coupled to the set of parallel ALUs and that is operatively coupled to the redundant parallel ALU. The input data shifting logic shifts input data for a defective ALU, in a first direction, to a neighboring ALU in the set. When the neighboring ALU is the last or end ALU in the set, the shifting logic continues to shift the input data for the end ALU that is not defective, to the redundant parallel ALU. The redundant parallel ALU then operates for the defective ALU. Output data shifting logic is coupled to an output of the parallel redundant ALU and all other ALU outputs to shift the output data in a second and opposite direction than the input shifting logic, to realign output of data for continued processing, including for storage or for further processing by other circuitry.

Here is how they are handling a bad ALU. You have one spare for a bank of ALUs and if one is bad they all shift data over and utilize the extra ALU.

http://www.freshpatents.com/Graphics...0060053189.php

Briefly, graphics data processing logic includes a plurality of parallel arithmetic logic units (ALUs), such as floating point processors or any other suitable logic, that operate as a vector processor on at least one of pixel data and vertex data (or both) and a programmable storage element that contains data representing which of the plurality of arithmetic logic units are not to receive data for processing. The graphics data processing logic also includes parallel ALU data packing logic that is operatively coupled to the plurality of arithmetic logic processing units and to the programmable storage element to pack data only for the plurality of arithmetic logic units identified by the data in the programmable storage element as being enabled.

Power Saver functionality for defective ALU