[silence]

ok, maybe this sound arrogant, but is there any chance we could get sticky or moderated topic with useful information taken out of this topic?

reading it just makes you mind go in circles.... all i am asking (since i am interested in R520) is that there is some sort of moderated topic where people who cant follow all this would get info that is at least confirmed by couple sources .... like Dave, Uttar and Demirug/chalnoth/Kombatant/Jawed.... just these 3 in special topic. maybe even copy-paste from here to there.....

dont get me wrong guys, buy its painfull to go through all this.... i dont want to offend anyone, but i think topic with posts from those i mentioned would help us (less informed) to keep up with your disscusion here.

its really hard to keep up with you......

[incurable]

Interesting choice of participants you got there ...

[Pete]

Short summary of all the rumors most believed (or at least repeated :P) at B3D, AFAIK, IIRC, YMMV, remember this is a free forum for hobbyists with spare time, etc.:

• SM3 and "HDR" (FP blends and buffers), at the very least (edit: added, thanks to wireframe)
• 90nm low-k, high core speeds, same bus width, likely revamped "memory architecture"
• if Huddy's infamous (and by now old) PDF notes are to be believed, low/minimal branching penalty compared to NV40 (edit: my reasoning, right or wrong)
• more shaders/ALUs per "pipe?" separated ROP from fragment pipe, and thus not a 1:1 ratio?
• some trouble hitting targets (speed? yield? recent Orton interviews say the former without explicitly addressing the latter, IIRC)
• 16 "extreme" pipelines (but last time we heard ATI say "extreme" pipes, it meant "multiply by 2"--tho the more knowledgable here are hinting that's not the case this time)
• R520 (relatively) more of a R300 derivative, but with some R400 (aka R500/C1/Xenos) in it. R580 has more R400 in it. RV515 is closer to R520, RV530 is closer to R580. R580 on schedule, so potentially (but not likely, IMO, tho it may depend on nV's response) not much time b/w R520 and R580.
• R520 is "16-1-1-1," R580 "16-1-3-1," RV515 "4-1-1-1," RV530 "4-1-3-2." (<-- one of those R580/RV530 numbers may be wrong) (edit: corrected, thanks to no-X)
• it's possible they threw in further AA improvement among all this other tweaking and reworking

Your request wasn't so much arrogant as probably a typical and understandably exasperated response to the multiple 30+ page R520 threads. I've been following most/all of the public speculation, and I'm still not comfortable predicting much beyond 90nm, a 256-bit mem bus, and high core speeds. I haven't been privy to inside info, though. Still, I'm not sure I'd expect anything *too* radical, at least until Xenos has been around for a while and DX10 is released. That leaves me open to pleasant surprises, though we certainly haven't seen many from ATI recently.

[no-X]

R580: 16-1-3-1

[wireframe]

Originally Posted by Pete

[*]if Huddy's infamous (and by now old) PDF notes are to be believed, low/minimal branching penalty compared to NV40.

This is tangential, but I am not sure how this conclusion was reached from those notes. (Well, apart from wishful thinking and wanting to believe that ATI does things right and Nvidia does things wrong.)

[Pete]

IMHO, you could infer one of two things from Mr. Huddy's note:

1) R520 will bring the goods, or
2) 3D cards in general will be so fast by then that the penalty won't be as painful.

I choo-choo-choose 1), because it makes the most sense to me.

But even that presentation assumed R520 (actually, was it even known as R520 back then, or were we still saying R500?) would arrive sooner than it did, no? I may be misremembering again.

Or are you saying benchmarks didn't support his contention that NV40 wasn't sufficiently fast with branched code? I thought they did, but, again, my memory is suspect.

[digitalwanderer]

Originally Posted by Pete

Short summary of all the rumors most believed (or at least repeated :P) at B3D, AFAIK, IIRC, YMMV, remember this is a free forum for hobbyists with spare time, etc.:

• 90nm low-k, high core speeds, same bus width, likely revamped "memory architecture"
• if Huddy's infamous (and by now old) PDF notes are to be believed, low/minimal branching penalty compared to NV40
• more shaders/ALUs per "pipe?" separated ROP from fragment pipe, and thus not a 1:1 ratio?
• some trouble hitting targets (speed? yield? recent Orton interviews say the former without explicitly addressing the latter, IIRC)
• 16 "extreme" pipelines (but last time we heard ATI say "extreme" pipes, it meant "multiply by 2"--tho the more knowledgable here are hinting that's not the case this time)
• R520 (relatively) more of a R300 derivative, but with some R400 (aka R500/C1/Xenos) in it. R580 has more R400 in it. RV515 is closer to R520, R530 is closer to R580. R580 on schedule, so potentially (but not likely, IMO, tho it may depend on nV's response) not much time b/w R520 and R580.
• R520 is "16-1-1-1," R580 "16-1-3-1," RV515 "4-1-1-1," RV530 "4-1-3-2." (<-- one of those R580/RV530 numbers may be wrong) (edit: corrected, thanks to no-X)
• it's possible they threw in further AA improvement among all this other tweaking and reworking

Your request wasn't so much arrogant as probably a typical and understandably exasperated response to the multiple 30+ page R520 threads. I've been following most/all of the public speculation, and I'm still not comfortable predicting much beyond 90nm, a 256-bit mem bus, and high core speeds. I haven't been privy to inside info, though. Still, I'm not sure I'd expect anything *too* radical, at least until Xenos has been around for a while and DX10 is released. That leaves me open to pleasant surprises, though we certainly haven't seen many from ATI recently.

Good summary, thanks.

/me runs to e-mail Fudo to play the "slow Sunday, make Fudo post some BS" game me loves sooo much.

[Hyp-X]

Originally Posted by Pete

[*]if Huddy's infamous (and by now old) PDF notes are to be believed, low/minimal branching penalty compared to NV40

When, I asked him about dynamic branching performance he said something about dynamic branching isn't suitable for the way graphics hardware is working.
I concluded that R520 won't have spectacular DB performance.
That was a few months after the PDF notes...

[Pete]

Thanks, Hyp-X. Then, as wireframe noted, I wrongly interpreted Richard's note.

[wireframe]

Originally Posted by Pete

Thanks, Hyp-X. Then, as wireframe noted, I wrongly interpreted Richard's note.

I was (am) really tempted to discuss that particular point, but I am not sure how welcomed that would be in this thread. I don't think you made a unique interpretation. I think you have an interpretation that was given life at the time NV40 and R420 came out and there was lots of mudslinging from both sides. I just wanted to point out he never said what you implied and I also don't think it makes sense to make that conclusion from only what Huddy said (if you got involved in previous interpretations, ie: "NV40 is bad at PS 3.0!!" (exaggerated joke) then I can see how you may have concluded that, but it is not what Huddy said).

However, and for you summary, there was another note on that same slide where Huddy mentioned "flow control". Perhaps it should be on the list. (my bolding)

Originally Posted by Richard Huddy in 'Save the Nanosecond' notes

Blend etc will be on NV40 and on our own SM3.0 parts

And this text is just here because I cannot edit the original end of this post without getting an error that my message is too short.

[Dave Baumann]

I wouldn't necessarily dismiss any appraisals of Richards words.

[Megadrive1988]

from everything known right now, ATI's future is looking like..

Immediate future: R520, Crossfire, Xbox 360 [couple months away]

near-term future: R580 [several months away]

mid-term future: Revolution, R600 family [ a year+ away]

long-term future: R700, R800 families [ several years away]

[Pete]

wireframe, IIRC, this (source page) influenced my inference, rightly or wrongly.

Whoops! It's been said FP blending would be included for so long that I just assumed it wasn't news. (I consider calling a GPU "SM3" to imply FP blending, unless I'm participating in a less-informed thread, in which case I explicitly distinguish between the two.) Why I thought 90nm was more important than FP blending, I can't say. Thanks, I'll update the summary.

[_xxx_]

Originally Posted by Megadrive1988

long-term future: R700, R800 families [ several years away]

Now how did you come up with that?

[_xxx_]

Some new tidbits at DigiTimes:
http://www.digitimes.com/news/a20050905A6033.html

In addition, ATI has begun to design an R-series GPU, the R516, for the entry-level graphics card market. However, the R516 will be built with a 90nm process at United Microelectronics Corporation (UMC), instead of TSMC, the source noted.

Now what the hell is R516? Totally borked 4-pipe failed R520 rests?

[Xmas]

Err... the quote explains precisely what R516 is: an entry-level chip to be manufactured at UMC (I guess it's a simple port of R515 to UMC libraries).

[Tim]

Originally Posted by Xmas

Err... the quote explains precisely what R516 is: an entry-level chip to be manufactured at UMC (I guess it's a simple port of R515 to UMC libraries).

I think that should be the RV515 and RV516.

[_xxx_]

Yeah, I'm just going crazy with all the numbers. Soon these will be 4-digits if they keep this pace...

[CMAN]

They just need to add a decimal. R520.239 will be out soon also I bet.

[CJ]

Originally Posted by Dave Baumann

Actually, RV505 isn't really that interesting since its just a lower cost RV515 - probably coming from UMC.

So if RV516 is the UMC version of the RV515 to cut the costs... then what is RV505?

[no-X]

HyperMemory low-end?

[vol2005]

Just get some info on R520

Looks like there was used high-k dielectrics ( supposedly Al2O3)in R520 manufacturing process. ( anybody who is experienced in chinese could go there and check. )

p.s. if someone could comment i appreciate

[MuFu]

Originally Posted by vol2005

Just get some info on R520

Looks like there was used high-k dielectrics ( supposedly Al2O3)in R520 manufacturing process. ( anybody who is experienced in chinese could go there and check. )

p.s. if someone could comment i appreciate

Err... not 100% sure on this but they are probably using Al2O3 on transistor gates (where high-k is generally desirable). low-k dielectrics are used on interconnects.

[AlStrong]

Originally Posted by CJ

So if RV505 is the UMC version of the RV515 to cut the costs... then what is RV516?

Fixed

[mapel110]

ROPs, completely orthogonal to the frame buffer format, must be a nice addition. They will allow MSAA in case of FP16 HDR — such a function is not available in the NV4x/G70.
http://www.digit-life.com/articles2/...orpc-05q2.html

Sounds interesting, any truth to this?