[Pottsey]

I was wonder what the chance is of PowerVR Series 5 PC chips having free FSAA. As if they can fit it into a mobile phone chip with limited space, is there any reason why we cannot see x16 FSAA without a performance hit in the next PC chip?

What do people think the response would be if Series 5 was under Geforce 6 speeds without FSAA but over Geforce 6 speeds with 16x FSAA. What if its over Geforce 6 speeds with FSAA and a Geforce 6 running without FSAA?

Is it reasonable to assume anything in the mobile MBX chip could also be added to the PC chip?

[Rodéric]

I don't know how it's supposed to be free.
My only idea atm is that it relies on downsampling the Tile output to the framebuffer, such having no memory bandwidth hit, neither the need for a super sampled FrameBuffer.
However that would mean more tiles (as many times the tile count required for the screen size as the multiplier factor ie 2 times for FSAA2x...)

Anyone have a better idea (or knowledge) ?
[and no Simon and Kristof, if it's just to say YES you don't have my permission to reply to this thread ]

[Dave B(TotalVR)]

Having put some more thought into it, I am not so sure that even with MSAA Series 5 would do AA entirely for free.

It was hugely implied that metagence would be on board the next-gen PowerVR chip when Metagence first came out. It was stated that it would be used in 3D graphics. Metagence is good because it allows real time, no-overhead mips allocation in your processor. As I understand it MSAA may be cheaper in terms of performance but it is not cheaper in terms of real estate. Therefore it would make sense, if the capability was there via metagence, to re-allocate real estate used for MSAA to other tasks like pixel shading et cetera. This would mean that turning MSAA off would increase the available pixel processing power on the chip. That said, it wont increase the available memory bandwidth and the card may find itself bandwidth limited if that were the case (unless they stick decent ram with the chip )

However, thats all speculation with no grounding in concrete info.

So lets say series 5, hypothetically released next week, can do 16x MSAA with no performance hit. Thats a serious case of if you ask me and providing it can be backed up with raw performance, high tap anisotropic filtering and a full set of features then the card would be seriously It would certainly cause a ruckass in the 3D market and establish PowerVR as a serious contender in desktop 3D. IMO this is all very possible with PowerVR tech so it begs the question...

Why hasn't it happened yet

[jvd]

I thought 2x on mbx doesn't take a bandwidth or fillrate hit. But 4x takes a bandwidth hit.

And yes i'm pretty sure that they do supersampling with the tiles and then downsample them to your choosen res

[Pottsey]

�I thought 2x on mbx doesn't take a bandwidth or fillrate hit. But 4x takes a bandwidth hit.�
Well if that’s true stick on the same fast ram as a Geforce 6 and you have enough bandwidth to run at x4 FSAA all the time without every losing performance? Any reason this would not work?

[Dave B(TotalVR)]

INGENU:

As I understand it MSAA upsamples the geometry information and renders in blocks, but only takes one texture sample where it defines a pixel as 'non-boundarial' (not on the edge, but I liked that word) otherwise it takes N samples according to the AA level inside those blocks. The frame buffer is then downsampled afterwards. This means 4x the z-buffer access and 4x the framebuffer access but only a slight fillrate and texture bandwidth penalty.

In the case of PowerVR the z and framebuffer access is on chip hence it is only the slight fillrate and texture bandwidth penalty that would effect its performance when using MSAA.

Just to clarify on the framebuffer - it is written to external memory only once, after downsampling, multiple re-reads for transparency blending and such are all completed - i.e. that 32x16 scene tile is completely and utterly rendered.

I cannot say for sure, but I think Series 4 was going to ship with MSAA support. :?

[jvd]

Originally Posted by Pottsey

�I thought 2x on mbx doesn't take a bandwidth or fillrate hit. But 4x takes a bandwidth hit.�
Well if that’s true stick on the same fast ram as a Geforce 6 and you have enough bandwidth to run at x4 FSAA all the time without every losing performance? Any reason this would not work?

It would work on 2x and 4x there would be a hit (dunno how big it would be compared to nvidia or ati's methods) but who knows about 6x or higher .

Of course all they need to do is make a 8x1 at 300-400mhz . That would be 8x1x400=3200x2.5=8000 . Compared to the 6800ultra 16x1x400mhz=6400 .

They would already have a fillrate advantage with a much smaller transistor count. SO even if 2x or 4x can't be done for free they would still have higher framerates across the board (with out any pixel shader or vertex shaders factored in)


So the power vr tech can really put a hurting on ati or nvidia . They just need to launch it with dx 9 support .

[notAFanB]

So the power vr tech can really put a hurting on ati or nvidia . They just need to launch it with dx 9 support .

keep dreaming jvd.


whether for technical reasons (doubtful) or financial(likely) or just plain idiocy we haven;t seen a REAL contender from TBDR for a long time now.

WTF are they doing with this technology? sitting on it?

can someone explain the logic of this towards why we cannot just shove a bunch of DX9 features onto an TBDR and crush the current top tier leaders?????

[Xmas]

Originally Posted by Dave B(TotalVR)

In the case of PowerVR the z and framebuffer access is on chip hence it is only the slight fillrate and texture bandwidth penalty that would effect its performance when using MSAA.

Just to clarify on the framebuffer - it is written to external memory only once, after downsampling, multiple re-reads for transparency blending and such are all completed - i.e. that 32x16 scene tile is completely and utterly rendered.

The point Ingenu made was that adding MSAA means you need to either
a) keep more information per tile in the internal memory, which requires increasing the size of this memory area. Or,
b) reduce the size of a tile so the amount of information fits into the same space of internal memory, which means more tiles per scene, which means more binning work and eventually higher bandwidth requirements.

[Rodéric]

Originally Posted by Dave B(TotalVR)

INGENU:
...
I cannot say for sure, but I think Series 4 was going to ship with MSAA support. :?

Okay got it.

[Pottsey]

“WTF are they doing with this technology? sitting on it?"

Far as I can see PowerVR are settings them self’s up for becoming market leaders in the mobile market that is far bigger then the PC market. At lest 6 out of 10 biggest mobile companies have all licensed mobile chips from PowerVR and I can see PowerVR taking a very large market share by the end of this year to next year enough to make the PC market look small. It make sense to focus on the mobile market first then the smaller PC market 2nd. One thing for sure is PowerVR are not just sitting on the technology they are using it right now and now the mobile chip is all but done I guess they will more some of the team over to the PC chip team.

[MfA]

Of course they are bleeding money making designs for PCs, sure it helps a bit as advance R&D (and they can recoup a bit for their Arcade designs too, but that is peanuts). It is not exactly the most efficient way of doing that if you never ship anything. Also by not being in the PC market you lessen the chance of being accepted as a partner for consoles IMO.

[Pottsey]

“Also by not being in the PC market you lessen the chance of being accepted as a partner for consoles IMO.�
I don’t agree having a high presence in the arcade market is better for a console chip. Part of the reason they got the Dreamcast deal was the arcade games where easy ish to transfer from PowerVR arcade units to PowerVR console’s. console’s gamers much prefer to think hey I get a arcade style chip in my console. They hey I got a PC style chip in my console.

Console gamers dont care about PC chips. Same for the companys who make Consoles.

[MfA]

The design and time to market constraints for PC chips are much closer to consoles ... it is a proof of reliability more than a PR thing.

[Dave B(TotalVR)]

Originally Posted by Xmas

The point Ingenu made was that adding MSAA means you need to either
a) keep more information per tile in the internal memory, which requires increasing the size of this memory area. Or,
b) reduce the size of a tile so the amount of information fits into the same space of internal memory, which means more tiles per scene, which means more binning work and eventually higher bandwidth requirements.

Not a problem. Yes you would need more memory for each tile but how much memory do you need to store a 32x16 pixel scene?. At 128bits per pixel (over-estimate) thats 8kb. The chip probably has more texture cache than that. Of course if they were to go for super high internal precision (which would be a great idea IMO) then even if that were made up to 32kb its still well within the reach of current technology.

Also, as for b) sure that would mean more binning work, but the binning section of the pipeline in PowerVR is a long way off being the bottleneck. There was some worry about the footprint of the ecene dat being an issue. I was skeptical of that myself but there is already a new patent on a technique to reduce this (dynamicly replacing tile vertex data as it is rendered).

Dave

[MfA]

It's been a long time since I read a PowerVR patent ... what does the tile store? Just a depth value and a surface id? (And maybe some barycentric coordinates.) Or a full set of shading parameters?

[Ailuros]

a) It is my understanding that according to Metcalfe's public statements there's a fill-rate hit with 2x vertical Supersampling on MBX.

b) I saw in his recent 3GSM presentation mentioning also Multisampling support for MBX.

c) Why on God's green earth are you guys assuming that the used tile size between Series3 and MBX is identical?

You may excuse the interruption...

[Rodéric]

Indeed I'm a worried about binning, I fear there can be a limit here that we don't know about.


Ailuros
c) because that's the good size for all standard screen res ?
800x600 for a 64x32 tile give 12.5 tile... dunno if it's supposed to handle 'cut' tiles...

[Ailuros]

Ingenu,

IMHO to think in Series3 terms when it comes to MBX could be misleading.

Question: how did Gigapixel handle tile sizes on the other hand?

[notAFanB]

One thing for sure is PowerVR are not just sitting on the technology they are using it right now and now the mobile chip is all but done I guess they will more some of the team over to the PC chip team.

I am well aware of that, but liek my constant spewing a few posts above I would *really* love to see them return to providing a really bleeding edge uber performence product.

but your right it does look like they redirecting their more profitable (and frankly where they have the advantage right now) market.

[Gubbi]

Originally Posted by notAFanB

but your right it does look like they redirecting their more profitable (and frankly where they have the advantage right now) market.

Right. They have two advantages. Lower bandwidth requirement and better performance/watt. Both of these are the issues in mobile applications.

However, power is also going to be an important parameter in (this and the) upcoming generation. NV40 burns 75W! Because of the two slot cooling I can't put one in my XPC

Why Intel hasn't bought them yet is beyond me. Instant numero uno player in mobile graphics and the ultimate chipset core for integrated (aswell as discrete) PC solutions.

Cheers
Gubbi

[Scott C]

Also realize that one of the complaints people once had about deferred rendering is the space needed to store the binned geometry.

I recall Mr. Sweeney calculating that a complicated Unreal scene won't fit on a 32 MB card....

Well, we have much more memory space now, and one other big factor related to AA.

All forms of AA so far on "traditionals" require a large footprint of memory used. For a 32 bit 1600x1200 framebuffer and 6x AA you need 5x4x1600x1200 = 36MB of RAM for just the back buffer. Double that if you add the z-buffer. Current compression schemes mean that this memory is sparsely used, but it all has to be allocated and reserved.

On a PowerVR or Gigapixel AA scheme, there is NO z-buffer at all, and no extra space requirements for FSAA.

This leaves tons and tons of space for geometry.

You are left with the same basic advantage that deferred rendering has always had: The need to only process visible pixels and access texture data for these visible pixels.

Only with a z-only pass and perfect front to back sorting can this be even approximated, and even then there is a lot of waste. Such sorting is expensive (much moreso than binning) and traditionals are not so good at the state changes required for sending triangles in perfect front to back order.

Well, that's my two cents. FSAA for free, and with much less memory significantly offsets the only disadvantage a tiler has: memory space and bandwidth for geometry.

[Hellbinder]

as far as powerVR and not being considered for consoles because of lack of PC presence...

I am VERY confident that if SEGA was to decide to release another console tomorrow they would use an Imagine Tech design. SEGA loves those guys and their hardware.

[MfA]

They have an existing relationship, originally IMG got their foot in the door because of the pre-existing relationship with NEC (making PC products).

[CIN]

IMG tech has awesome technology and the SEGA devs have become very good with it because of the dreamcast. PVR chips have the best price/performance ratio so it is not a surprise that SEGA is continuing the relationship with IMG tech.

What I find surprising is that neither of the next gen consoles are using PVR chips which if they have the same raw specs as the other GPUs have an obvious advantage over the competition. :?

I am eagerly awaiting the N@omi 3 release now so we can see what the specs for this new PVR5 or custom chip are. I think it will be something very special if it is of the same level of PVR2DC when it was released. Usually if SEGA says it will be the most powerful chip available they are right. They are somewhat conservative.