[Arun]

This thread is the new "official" place to discuss ATI's upcoming R600 chip, plus all related products and technologies, at least for the time being. The following points should be kept in mind:

• The thread will be moderated to improve the signal-to-noise ratio slightly
• All off-topic discussions will be moved to other threads, or deleted, at our discretion
• This first post will be edited over time to link to related sources and leaks
• Further "summaries" may be based on concensus or apparent credibility, with minority reports generally noted

No matter how many stupid rules I come up with, the goal still is to have a good and active discussion going, so get started guys!

Summary
D3D10, 500M+ transistors, release sometime between January and the end of Q1 2007, certainly 80nm. Based on GDDR4, vast numbers of reports claiming a 512-bit external bus, although only midly reliable. Minority reports for 256-bit bus (although sometimes from more reliable sources), or a dual-chip solution (256-bit bus per chip, 2 chips per board).

The vast majority believe in the existence 64 unified "real pipelines" (4x16 ala Xenos' 3x16, although perhaps with different units internally). There are minority reports for 80 and 96. It is unknown what the exact organization of the pipelines will be. Xenos is Vec4+Scalar MADD per "pipeline". There are minority reports of a similar organization, as well as those of a more R580-like one, and finally also some reports or fully scalar units (4xScalar MADD + ???). None of them seem particularly more credible than the others at this point.

As per Direct3D10's requirements, native FP16 filtering should be supported, which should make Farcry HDR function on R6xx even with the original NVIDIA patch, at least in theory. Furthermore, little information is known on the AA and AF algorithms, with most believing they will be mostly similar to R580's. Minority reports of 8x MSAA support exist, however.

Reliable performance predictions are currently inexistant at this point, as only sensationalistic tabloid sites have been claiming any relative or absolute figure. It is likely that the chip will be much faster in Vertex Shading than R580, as per its unified nature. It is however unknown how high the triangle setup figures will be, as well as some other related ones such as attribute fetch. These might or might not become new bottlenecks in modern industry benchmarks. It is also unknown whether the number of TMUs and ROPs has increased from the R580's 16 each.

The power and heat figures of the R600 have been initially reported as being roughly "150W+", but recent minority reports have increased that number to 200-250W. Other older minority reports also mentionned 100-150W instead. Nothing reliable is known regarding heat dissipation and related technologies to minimize the problem, should these figures be accurate.

Links
The old R600 thread: http://www.beyond3d.com/forum/showthread.php?t=31049

[incurable]

I'm wondering about the cooling solution used, should R600 really go up into the 200W+ range, given the limitations on space available and the fact that -in a much less restrictive environment- even cooling a 130W Prescott was considered far from trivial.

Any word on a possible watercooling option on these parts (beyond the Sapphire Toxic special SKUs), as some have suggested available for G80?

Also, beyond R600 itself, I was wondering if there was anything known about its smaller brethren.

[Geo]

At one time it was being speculated that unification would be such a transistor-saver for low and low-mid that we might see a whole family if not simultaneously, then something close to it.

But I don't think we've heard anything about the rest of the family. The roadmap that mentions R600 in Q1 does not mention any others. . . but is labeled "High-end CrossFire Roadmap", so you wouldn't expect it to. . .

[Jawed]

Well, as I theorised in the other thread, shouldn't we be expecting 65nm value/mainstream/performance R6xx parts during the same quarter as R600?

Additionally, if they're all (or at least some) scheduled for near-simultaneous release, would that explain the relative tardiness? Is ATI simply taking advantage of the "lateness" of Vista?

Jawed

[epicstruggle]

Originally Posted by Uttar

D3D10

Stupid question time:
Any word whether ATI plans on releasing features beyond D3D10?

[trumphsiao]

Sorry I have to state few points I suspision

1. Raw Performance of R600 or G80 would not have more than 1.5 times that of G71

2. Why It's harder to polish Winxp driver for DX10 Hardware ?

[Arun]

Originally Posted by trumphsiao

1. Raw Performance of R600 or G80 would not have more than 1.5 times that of G71

So now you're telling us the G80 3DMark05/06 scores that leaked were shit? Decide yourself!

2. Why It's harder to polish Winxp driver for DX10 Hardware ?

It isn't. Drivers of truly new architectures always take more time to get right, that's all. Do you think the R300 and NV40 drivers were perfect overnight? Hint: They weren't. And there hasn't been such a massive architecture transition since.


Uttar

[psurge]

Uttar - maybe the scores were for g80 SLIed?

[^M^]

Originally Posted by psurge

Uttar - maybe the scores were for g80 SLIed?

Did the news report a power surge in Taiwan ?

[pjbliverpool]

I still say 64 Xenos style shaders isn't enough as it would have to run at insane clock speeds just to match R580's raw shader performance.

Plus didn't someone at ATI comment that the next gen would be over half a TFLOP? The chip would have to run at 875Mhz to achieve half a TFLOP

Im placing my money on either 96 Xenos sytle shaders at 600+ Mhz or 64, significantly beefed up shaders, again at 600+ Mhz.

In fact R600 could may well just be double Xenos. 96 ALU's, 32 TMU's, 32 vertex texture units? Then either 24 or 32 ROPS and hopefully that really juicy 512bit memory interface. All running at 600+ Mhz should make quite a nice next gen chip.

[Skrying]

Does the R600 really need a 512bit external bus? I would think it'd have to be mighty powerful for all of that bandwidth.

[Geo]

Hence the circular nature of the discussion. Pick the rumor you believe and work it out to its natural conclusion and you get to different places.

64 units would not seem to require 512-bit gddr4. So one or the other is likely incorrect, unless someone can point at a different way to circle the square. HDR? The R580+gddr4 results would not seem to support that idea. Really eye-popping core speed? 800MHz or higher? Well, NV seems to have done something with G80 shaders to get to 1350MHz, so maybe that possibility shouldn't be entirely dismissed, tho the conventional wisdom doesn't seem to favor it.

Oh yeah, toss some fairly frightening heat/power rumors in there too in trying to adjudicate the rumor mill. . . but that could go either way, either > 64 shaders or 800MHz+ clock. Would the power/heat rumors be consistent with 64 shaders at 650MHz? I tend to think not.

[Jawed]

I really can't understand why 64 pipes has any credibility.

If Orton winked when he said 96 pipes recently, why are people still beating round the bush?

Jawed

[Geo]

Oh, hang on. Orton winked and said 96? When/where was this?

The 64 comes from xbit claiming that ATI tipped them that way.

[Jawed]

http://www.techreport.com/etc/2006q4...g/index.x?pg=1

Jawed

[Geo]

Son of a gun.

Orton pegged the floating-point power of today's top Radeon GPUs with 48 pixel shader processors at about 375 gigaflops, with 64 GB/s of memory bandwidth. The next generation, he said, could potentially have 96 shader processors and will exceed half a teraflop of computing power.

Missed that. Right. Time perhaps to update the conventional wisdom watch then, even with that "potentially" hedge.

[Jawed]

It's why 512-bit has credibility for me, even though I'm dubious about die size being big enough for such a big bus, particularly with 65nm ~1 year away.

Jawed

[PeterAce]

So R500/C1 is 500 * (48 * 9) = 216000

So by that logic R600 might be:

600 * (96 * 9) = 518400

So 600 Mhz and six 16-way shader arrays. Very nice if true.

[psurge]

They can always shrink back to a smaller bus size and over-compensate with insane memory clocks, no?

[Skrying]

Originally Posted by psurge

They can always shrink back to a smaller bus size and over-compensate with insane memory clocks, no?

I wonder how that'd go over. Use a massive bus till you get insane memory clocks. Interesting, but I personally dont think it'd make sense. The marketing would be terrible, the layout for 512bit would be insane......... wait, does sorta sound like ATi.

[Geo]

Maybe, but your PR people will hate you. They hate getting everyone all ZOMG about something and then explaining later why the next part is still ZOMG when they take it away.

Not impossible, but generally not a happy prospect. And gddr4 is the big bump, so I dunno where you'd suddenly get that extra bw post gddr4. . .

[Ailuros]

Originally Posted by psurge

They can always shrink back to a smaller bus size and over-compensate with insane memory clocks, no?

Sounds like a huge waste of R&D resources if I didn't misunderstand you. I'm quite confident that IHVs know the limits for each future architecture right from the start.

[Geo]

Originally Posted by Jawed

It's why 512-bit has credibility for me, even though I'm dubious about die size being big enough for such a big bus, particularly with 65nm ~1 year away.

The harder I look at what TR reported Orton saying, the more I notice that he gave current bw, current flops, future flops, and. . .oh, wait, no future bw. But if you extrapolate from what he did give, you'd be lead to believe a number in the 120GB/s range. It's arranged in classic "what's the missing number" fashion almost.

Ha.

[psurge]

Hmm I was thinking something like xdr2. There's also some talk of GDDR5 already so who knows (maybe that'll reduce the pin requirements versus GDDR4?). I guess it's more likely for the ultra high-end chips to just keep pushing the die-size envelope ...

[Bouncing Zabaglione Bros.]

Originally Posted by geo

Oh, hang on. Orton winked and said 96? When/where was this?

The 64 comes from xbit claiming that ATI tipped them that way.

If you were ATI and wanted to blindside an earlier launching G80 by leaking a low number that would have Nvidia thinking they'd got you cold, only to come back with R300 style insanity....?