[Commenter]

I'm interested to know how the power efficiency of the very latest cpu archtiectures is compared to say cpu's from a few years ago (i.e. sandy/ivy bridge/bulldozer architectures). It's good that AMD and Intel are both appreciating the need for energy saving measures. Running at full speed all the time is obviously an unnecessary power draw so it's good the cpu's downclock to save power but I wonder if the efficiency of these technologies are being improved with every generation as well.

[Dominik D]

If you're interested in power efficiency, this presentation is a good starting point (Silverlight required):
http://mediasite.colostate.edu/Media...7157581c458a1d

The very, very, very brief version is "computation is cheap, data moves are expensive - CPUs are not gonna make it easier for you so code responsibly".

[Grall]

An ivy bridge processor in its lowest idle mode (all cores power gated off, presumably) has a power consumption of a mere handful of watts, and most of that probably due to the need to keep the RAM alive (which cannot be either put to sleep or reduced in clock speed, with current tech at least).

So when you have that kind of span between max and min power you've reached a pretty high level of power efficiency...

[Lightman]

Originally Posted by Grall

An ivy bridge processor in its lowest idle mode (all cores power gated off, presumably) has a power consumption of a mere handful of watts, and most of that probably due to the need to keep the RAM alive (which cannot be either put to sleep or reduced in clock speed, with current tech at least).

So when you have that kind of span between max and min power you've reached a pretty high level of power efficiency...

To add to what Grall said, AMD's Trinity can go as low as 1.1W in idle! Pretty amazing considering max. TPD chis is designed for is over 100W.

[tunafish]

Originally Posted by Grall

and most of that probably due to the need to keep the RAM alive (which cannot be either put to sleep or reduced in clock speed, with current tech at least).

You put it on self-refresh? The memory controller and the clock source to the ram can be turned off with modern ram.

[Grall]

Oh, I didn't know that. New with DDR3?

What's the wakeup penalty for something like that then?

[pcchen]

Originally Posted by Grall

Oh, I didn't know that. New with DDR3?

IIRC SDRAM already have that. You can simply low CKE, and with no command in flight, the SDRAM will shut down and automatically into self refresh mode. It uses an internal clock to refresh at the necessary time period.

SDRAM itself does not save much power from this mode (it still needs to refresh itself, after all), but the power saved from the memory controller is much higher.