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#26 | |
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Junior Member
Join Date: Apr 2006
Posts: 29
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"Kepler in super phones" (and presumably tablets) and "Graphics are still far away from photo realistic and can go beyond that" It's just cringe worthy stuff. |
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#27 | |
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PM
Join Date: Dec 2002
Posts: 1,381
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#28 | |
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Member
Join Date: Jan 2010
Posts: 924
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The logic says that Nvidia has a worse deal than they used to have. You should ask yourself that if things are so bad for Nvidia, how bad must they be for AMD? If nothing else has changed, AMD would be in an even worse position. It is highly likely that Nvidia has lost their cheap wafer agreement and now finds themselves paying the same as AMD and everyone else. Again you have to ask yourself - what does TSMC get out of giving Nvidia a better deal? 40nm proved to TSMC that Nvidia cares nothing about relationships - they were happy to put the boot in while TSMC was under threat from GF and I'm sure TSMC didn't forget that. |
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#29 | |
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Senior Member
Join Date: Sep 2003
Location: Well within 3d
Posts: 4,259
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Who is Nvidia addressing with these slides exactly? Some of those slides are about as sophisticated as marketing blather for gaming benches.
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There are possible cost savings, but there are a lot of conflicting motivations for the equipment manufacturers here. The transition to 300mm wafers was very painful for the tool makers, and it winnowed the customer pool significantly. 450mm is more expensive, and the number of customers even smaller. TSMC, if we are to follow Nvidia's numbers, would have a strong motivation to pursue bigger wafers since its smaller transistors don't look compelling. Intel has also been a strong pusher for 450mm wafers. We have seen further motions on this transition, but it still looks like the currently in-progress fabs are starting with 300mm wafers with the intent to someday start on 450.
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Dreaming of a .065 micron etch-a-sketch. |
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#30 | |
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Senior Member
Join Date: May 2008
Posts: 1,233
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![]() If you're looking at additional numbers like these you've got to be asking why would I even want to go to the next node? Because of the partnership I have with TSMC? The same partner who raised prices 45 days before going into production just because he suddenly became popular? What if they skip the next node? What happens to the others? Do they pay more because a big volume first adopter is sitting out? Do they sit out too? Who then pays for the capex of that new node? The fruit company? Wanna bet? |
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#31 | |
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Member
Join Date: Aug 2004
Location: Indiana
Posts: 483
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#32 | |
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PM
Join Date: Dec 2002
Posts: 1,381
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Now, if the data is accurate, then it is a problem for everyone using TSMC (and ultimately the end users), at least if you care about qualitative improvements in the end user experience continuing at the same pace as historical levels (without drastic price inflation). If you don't care about such things, for whatever reason, then perhaps this is not the thread for you.
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#33 | |
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Senior Member
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So while the chart presented by NVIDIA may be accurate when it comes to their own designs, it may not entirely reflect what other users of TSMC's services are seeing and expecting to see in the future.
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"Well, you mentioned Disneyland, I thought of this porn site, and then bam! A blue Hulk." —The Creature My (currently dormant) blog: Teχlog |
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#34 | |
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Senior Member
Join Date: Mar 2006
Posts: 1,713
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#35 |
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Itchy
Join Date: Feb 2002
Location: United Queendom
Posts: 2,859
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AMD suffered with its transition to 5xx0 architecture even though they ran "test" runs on the 4770 cards. There were similar yield issues with the 6xx0 architecture. We don't know how it is working out with the latest cards. NVIDIA has always complained about yield issues ever since the 40nm node so we know they have had issues.
I guess the question is should AMD/NVIDIA and other partners pay for testing? When there is only one horse in the race - unfortunately they do. What's needed is more competition in the semi-conductor field. It is a shame that Global Foundries is stumbling also. Another large competitor would have certainly benefited the end user. Of course there is a blindingly obvious solution to all this... unfortunately it means the IHV can no longer compete based on node shrinks Is the silicon free lunch is coming to an end?
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Time is an illusion. Lunchtime doubly so - Douglas Adams |
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#36 |
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Senior Member
Join Date: Sep 2003
Location: Well within 3d
Posts: 4,259
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Some specificity would be required to determine what the "free lunch" is.
It's never been truly free. The assumed scaling from an optical shrink ended years ago. Intel and AMD ran out of "cheap-ish lunch" territory somewhere around 130nm and 90nm. When I see editorializing on web sites about how we can't assume things will improve with a shrink just now, it just shows they haven't been paying attention. Everyone has had to work harder for years. If the general tech press is picking up on it, it just means that the foundries and fabless companies can't hide how hard it is anymore.
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Dreaming of a .065 micron etch-a-sketch. Last edited by 3dilettante; 26-Mar-2012 at 19:14. Reason: removed confused text |
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#37 | |
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Itchy
Join Date: Feb 2002
Location: United Queendom
Posts: 2,859
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Apple for instance did not jump onto 28nm for its A5X processor like some had assumed. And I agree it has been becoming harder for the IHV's to deliver but still they have been delivering [new faster, performing products at approx the same price, with more features and approx same amount of power consumption - wattamouthful] to a large extent. Perhaps that time is coming to an end as we hit the economics barrier f no return rather than "just" the physics one.
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Time is an illusion. Lunchtime doubly so - Douglas Adams |
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#38 |
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Senior Member
Join Date: Sep 2003
Location: Well within 3d
Posts: 4,259
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It's not worth being first if your situation matches Nvidia's, with good odds many fabless companies would.
There are players (or at least one) in a better position, so they will reap the monetary benefits.
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Dreaming of a .065 micron etch-a-sketch. |
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#39 |
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Artist formerly known as Acert93
Join Date: Dec 2004
Location: Seattle
Posts: 7,714
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Maybe the "free lunch" is getting harder to catch but since about 90nm whole, "Cut power by half, double density, increase clocks" has not held. As 3dilettante notes this has been going on for years--and it is often right in the fab press releases on new nodes. When you double your density but only improve power efficiency by 25-30% something has to give: If power limited you chip can only grow by 25-30% or if area limited your power consumption is going to nearly double for the same area chip (with ~ 1.9x as many transistors). And this has held true as GPUs, even with more power efficient designs, have seen their TDP steadily increase since the early 2000s.
It is unfortunate that TSMC is the only big player right now for IHV progressive fabbing. Hopefully GF gets there ducks in order, but even then as others noted the fact you just cannot pick up your GPU design at TSMC and seamless plug it in over at GF pretty much says everyone is stuck.
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"In games I don't like, there is no such thing as "tradeoffs," only "downgrades" or "lazy devs" or "bugs" or "design failures." Neither do tradeoffs exist in games I'm a rabid fan of, and just shut up if you're going to point them out." -- fearsomepirate |
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#40 |
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Itchy
Join Date: Feb 2002
Location: United Queendom
Posts: 2,859
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As other have pointed out - the slides that were released could be due to NVIDIA specific issues.
AMD certainly are faster at getting their graphics cards out sooner on the new nodes at least.
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Time is an illusion. Lunchtime doubly so - Douglas Adams |
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#41 |
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Senior Member
Join Date: Sep 2003
Location: Well within 3d
Posts: 4,259
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There may be some wrinkles specific to Nvidia, but the overal trends drawn are true if you are fabless company that needs to compete on the bleeding edge of manufacturing.
GF, a foundry, has shown unsustainable cost growth in its own presentations. The move for tighter integration between design and manufacturing steps is something all the foundries are struggling with, and they aren't all doing this for Nvidia.
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Dreaming of a .065 micron etch-a-sketch. |
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#42 |
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Itchy
Join Date: Feb 2002
Location: United Queendom
Posts: 2,859
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Do you think then IHV's asking to be treated as IDM's by TSMC is correct? I can't see that working. Have AMD released themselves from that sort of arrangement with Global Foundries?
Interesting to see the contrast in reaction - AMD talks about changing its strategic goals and not competing at the very high end against Intel (albeit they were mainly talking about CPUs rather than discreet GPUs at that time) and NVIDIA seemingly goes for TSMC's jugular with these somewhat childish slides - asking to be treated as an IDM and rough fair justice (what does that even mean?!)
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Time is an illusion. Lunchtime doubly so - Douglas Adams |
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#43 |
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Senior Member
Join Date: Sep 2003
Location: Well within 3d
Posts: 4,259
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AMD's CPU side probably gets the laugh track for hopping from the the model just prior to when the entire fabless industry realizes it has to be more like an IDM.
edit: To note, years ago when the idea of a spin-off was rumored, I said that if AMD did this it might as well give up competing in x86, and it increasingly looks like it has. AMD didn't stop being an IDM because being and IDM wasn't the best way forward for manufacturing on leading-edge nodes, they did it because they were on the verge of imploding. What Nvidia says is necessary is not unique to them, and fabs like GF have been talking about or offering some of these steps already. This is also something I don't quite get about Nvidia's presentation, since it's not something newly discovered or a secret. What are they trying to do with these slides?
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Dreaming of a .065 micron etch-a-sketch. |
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#44 | |
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Itchy
Join Date: Feb 2002
Location: United Queendom
Posts: 2,859
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To change the status quo - at a guess and complete stab in the dark they are unhappy with the deal they have with TSMC and when negotiations didn't go their way they are looking for hearts and minds (the interweb) to rally against the tyranny of the evil semi fab.
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Time is an illusion. Lunchtime doubly so - Douglas Adams |
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#45 | ||
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Senior Member
Join Date: Mar 2006
Posts: 1,713
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#46 | |
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Itchy
Join Date: Feb 2002
Location: United Queendom
Posts: 2,859
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Quote:
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Time is an illusion. Lunchtime doubly so - Douglas Adams |
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#47 | |
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Senior Member
Join Date: Sep 2003
Location: Well within 3d
Posts: 4,259
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Dreaming of a .065 micron etch-a-sketch. |
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#48 |
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Member
Join Date: Jun 2008
Posts: 336
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Personally, I think its more of a "why 294mm^2 costs the same as 550mm^2 did, and we're just as mad as you guys" which is sort of damage control after the viral marketing BS they put out about AMD overcharging for 7970.
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#49 | |
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Senior Member
Join Date: Mar 2006
Posts: 1,713
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In addition, you'll certainly agree that it's a bit of a stretch for different companies have dramatically different results for an identical process. After all, like I said before, the D0 doesn't change. In addition, (successful) tech companies are highly reactive wrt things going wrong: if you see that somebody does better, you better fix it. That's what project post mortems are for. In the case of Kepler, it's obvious that Nvidia spent a lot of effort fixing earlier wrongs. The visible ones are things like perf/mm2 and perf/W, but it's foolish to thing that they only looked at visible aspects. |
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#50 | ||
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Unknown.
Join Date: Aug 2002
Location: UK
Posts: 4,882
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[Apologies for the hilariously long post, I haven't written anything so long on Beyond3D since I started working so I got carried away a bit! Obviously these are strictly my own opinions and I'm not speaking for anyone else here)
Frankly NVIDIA's slides don't make much sense to me, likely because they're intentionally making things look worse than they really are. First of all I somewhat suspect they're somehow including the cost of the the I/O elements that don't scale (i.e. their 'scaling factor' is less than the actual transistor scaling). But more importantly, if the cost of 40nm transistors only became cheaper than 55nm transistors in Q4 2010, then why does their other graph show that they manufactured ~4x more wafers on 40nm than 55nm for the full year of 2010? Some of that can be attributed to their DX11 architecture being 40nm-only, but then why did they manufacture nearly 1/3rd as many 40nm wafers as 55nm wafers in 2009 when the costs were so much higher? The answer is very likely power consumption (and performance to a lesser extent but these are somewhat interlinked if you can adjust your voltage). You pay more per transistor but each transistor is more power efficient. This also implies that NVIDIA's entire argument is rather dubious: as there is a fundamental trade-off between area and power at several different design points (architecture, synthesis, voltage, etc.) then it would make more sense to compare cost for identical power consumption (roughly speaking as this is highly non-linear). And when you do that, the new process node will become more cost efficient much faster than it does when only comparing transistor cost. It's certainly true that both cost per transistor *and* power consumption scaled down faster several process generations ago. That doesn't mean process scaling is anywhere near dead yet and I'm sure that NVIDIA realises that. I suspect that what they're really trying to do there is pressure TSMC to accept lower gross margins on new processes to essentially subsidise early adopters (i.e. NVIDIA but also AMD/Qualcomm). They already do that but obviously NVIDIA would like them to do so even more. By the way, we do have some actual cost targets from TSMC for 28nm vs 40nm and for 20nm vs 28nm. They are quite revealing: Quote:
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Anyway it's pretty clear that a significant part of the wafer price increase on 28nm and the expected increase on 20nm is just TSMC trying to make more money before the process is amortised, and NVIDIA is fighting back to try to get TSMC to subsidise early adopters more. They'll probably just meet in the middle like they always do and this whole thing will amount to nothing (especially as it dates back from November and 28nm yields have increased significantly since then). I don't think there's any chance of NVIDIA leaving TSMC as long as Jen-Hsun and Morris Chang are both CEOs anyway since they're good personal friends. Morris won't be CEO forever though, he already came back from retirement when 40nm was becoming a huge problem in order to convince customers, e.g. Jen-Hsun, to stick with them rather than switch to GlobalFoundries. On the other hand, it's also very clear that 20nm cost will increase significantly more than 28nm cost, and wafer prices will increase more accordingly. This is despite 28nm introducing High-K and 20nm not using FinFET. I think TSMC would really really like to use either e-beam or EUV at 14nm rather than keep using more and more expensive variants of immersion litography (BTW, isn't it ironic how EUV was seen by some as likely being forever too expensive 5 years ago, and now the alternatives have become so expensive that lots of people have started looking at it as a way to reduce costs? TSMC still prefers e-beam which is interesting though, I actually hope that gets to market because it would have some more interesting consequences)
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Focusing on non-graphics projects in 2013 (but I still love triangles) "[...]; the kind of variation which ensues depending in most cases in a far higher degree on the nature or constitution of the being, than on the nature of the changed conditions." |
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