[Dave Baumann]

http://biz.yahoo.com/bw/071108/20071107006687.html?.v=1

AMD Delivers First Stream Processor with Double Precision Floating Point Technology
AMD Firestream 9170 and Supporting Software Development Kit Unlock Stream-Based Accelerated Computing

SUNNYVALE, Calif.--(BUSINESS WIRE)--AMD (NYSE: AMD - News) today announced the AMD FireStream 9170 Stream Processor and an accompanying Software Development Kit (SDK) designed to harness the massive parallel processing power of the graphics processing unit (GPU). AMD leveraged its unique collective expertise in both GPUs and CPUs to deliver the first integrated hardware and software development solution that meets the needs of the demanding high-performance computing (HPC) market. AMD plans to deliver the FireStream 9170 and supporting SDK to market in the first quarter of 2008. With this launch AMD expects to achieve another important milestone on the path to Accelerated Computing by delivering the first in a series of next-generation heterogeneous compute architectures.

“With a broad range of customer engagements underway, notably customers in the oil and gas, financial and engineering analysis industries, AMD is delivering on its vision of Accelerated Computing with breakthrough benefits for our enterprise customers,” said Rick Bergman, Senior Vice President and General Manager, Graphics Products, AMD. “Leveraging the immense graphics processing capabilities acquired from ATI and the HPC domain expertise of AMD, we are developing strong relationships with system vendors and the supporting technology eco-system to deliver processing innovation through an open platforms approach.”

AMD FireStream 9170
The AMD FireStream 9170 will be the world’s first Stream GPU with double-precision floating point technology tailored for scientific and engineering calculations. Competitively priced at an MSRP of $1999 USD, it features up to 500 GFLOPS(1) of compute power, rivalling many of today’s supercomputers, and providing dramatic acceleration for critical algorithms. This second generation Stream Processor is built with 55 nm process technology and consumes less than 150(2) watts of power – delivering an exceptional performance per watt. In addition, the reduced heat dissipation allows it to function in dense design configurations. The FireStream 9170 is a single card solution with two GB of onboard GDDR3 memory to compute large datasets without CPU traffic. The asynchronous direct memory access (DMA) ensures data can flow freely without interrupting the stream processor or CPU.

“GPUs have long been known for their immense parallel processing performance but many challenges still remain in driving widespread customer adoption for general purpose compute,” said Jon Peddie, President, Jon Peddie Research. “Leveraging its unique capabilities in high-performance CPU and GPU technologies, AMD is well positioned to drive an integrated hardware and software proposition that can deliver the best of both processing worlds to its HPC customers.”

AMD FireStream SDK
The AMD FireStream SDK is designed to deliver the tools developers need to create and optimize applications on AMD Stream processors. Built using an open platforms approach, the AMD FireStream SDK allows developers to access key Application Programming Interfaces (APIs) and specifications, enabling performance tuning at the lowest level and development of third party tools. Building on AMD’s Close to the Metal (CTM) interface introduced in 2006, the Compute Abstraction Layer (CAL) provides low-level access to the GPU for development and performance tuning along with forward compatibility to future GPUs. For high-level development, AMD is announcing Brook+, a tool providing C extensions for stream computing based on the Brook project from Stanford University. In addition, AMD also plans to support the AMD Core Math Library (ACML) to provide GPU-accelerated math functions, and the COBRA video library accelerates video transcode. Also available are third-party tools from top industry partners including RapidMind and Microsoft.

In addition, AMD is now a charter participant in HP’s new HPC Accelerator Program, offering HP customers best practices and guidance for these technologies, and ensuring that accelerator hardware and software is qualified for HP servers running HPC applications.

“As innovative new HPC technologies like Stream Computing emerge, it is imperative we work with our partners to ensure an open systems approach to enable new levels of processing efficiency and performance,” said Winston Prather, vice president and general manager of HPC at HP. “As part of HP’s new HPC Accelerator program, we’re working closely with AMD and our customers to deliver an optimal mix of hardware innovation and open, collaborative development environments to ensure delivery of best-in-class HPC platforms.”

About AMD
Advanced Micro Devices (NYSE: AMD - News) is a leading global provider of innovative processing solutions in the computing, graphics and consumer electronics markets. AMD is dedicated to driving open innovation, choice and industry growth by delivering superior customer-centric solutions that empower consumers and businesses worldwide. For more information, visit www.amd.com.

1 Refers to peak single precision performance of AMD FireStream 9170 Processor. Based on 320 stream cores and engine clock rates of 775-800MHz.

2 Refers to TDP of single AMD FireStream 9170 Stream Processor. Refers to maximum TDP of AMD FireStream 9170.

Some articles:
http://www.internetnews.com/bus-news...le.php/3709826
http://www.reuters.com/article/marke...0071108?rpc=44
http://www.news.com/one-more-thing/8...813173-37.html

Specs:
http://ati.amd.com/products/streamprocessor/specs.html

[AlphaWolf]

Is this

consumes less than 1502 watts of power

a typo?

<edit> oic, its supposed to be a 2 for the footnote.

[Freak'n Big Panda]

RV670 based right? Anyways it's about time AMD released something to compete with telsa.

[Tim Murray]

So, did you hire Mike Houston?

[B3D News]

AMD has just announced the RV670-based FireStream 9170 GPGPU processor as well as the FireStream SDK. Notable are 2GB of RAM, a 775-800 MHz core clock, 500 GFLOP/s, and Brook+ (based on Brook, obviously!) as the official high-level language.

Read the full news item

[Jawed]

Blimey, AMD beat L'Inq to the punch

So, er, why's the double precision GFLOP "rating" a secret?...

Jawed

[Tim Murray]

Originally Posted by Jawed

Blimey, AMD beat L'Inq to the punch

So, er, why's the double precision GFLOP "rating" a secret?...

Jawed

After talking to a number of CEs, I'm going to guess it's quarter-speed; otherwise, the transistor count hit would be enormous.

[CruNcher]

Here you can find infos http://www.forum-3dcenter.org/vbulle...&postcount=685 for Sapphires HD3800 Series Card Marketing Material says

128-bit floating point precision for all operations

[AlexV]

Originally Posted by CruNcher

Here you can find infos http://www.forum-3dcenter.org/vbulle...&postcount=685 for Sapphires HD3800 Series Card Marketing Material says

That's FP32, nothing relevant to the double precision. Double precision would mean FP64...per component/channel. Multiply that with 4(as there are 4 of em traditionally ,ARGB, for example) and you'll get the type of big number marketing likes.

[Jawed]

Hopefully Brook+ and all the other stuff will run on consumer cards.

Jawed

[Geo]

Now, will we see DP exposed in the consumer version as well?

[Tim Murray]

Originally Posted by Geo

Now, will we see DP exposed in the consumer version as well?

If we do, I'll eat a hat, especially if they eventually release a 1GB consumer RV670.

[3dilettante]

What's the chance that hefty 2 Gigs of RAM comes with ECC?

There may be a few folks looking at a large system that would like at least that much of a nod towards reliability, or is AMD hoping to inflate its sales volume by forcing customers to buy more hardware for the sake of error checking?

[Tim Murray]

Originally Posted by 3dilettante

What's the chance that hefty 2 Gigs of RAM comes with ECC?

There may be a few folks looking at a large system that would like at least that much of a nod towards reliability, or is AMD hoping to inflate its sales volume by forcing customers to buy more hardware for the sake of error checking?

Zero. It'd be in the press release if it did have support.

[Geo]

Hat eating seems to be the new prognosticator currency hereabouts!

[ShaidarHaran]

Let's see if NV matches 'em. DP in Quadro/Tesla before year's end?

[Jawed]

From:

http://www.cisl.ucar.edu/dir/CAS2K7/...torricelli.pdf

MXM for embedded sounds useful.

Jawed

[Tim Murray]

Originally Posted by ShaidarHaran

Let's see if NV matches 'em. DP in Quadro/Tesla before year's end?

I honestly think DP is much less important than NV/AMD have claimed. It's an easy buzzword, but the two big problems that I see with GPGPU in the next year are the perception (and maybe reality) that you're writing for one architecture and code won't scale as well as the lack of reasonable development environments. DP is turning away some HPC people, sure, but I don't think that HPC is where the future of GPGPU lies.

PS--I don't get why you'd want MXM? Double-precision computation on a laptop...? Why? Unless this means that these apps won't work at all on consumer RV670s.

[Jawed]

Originally Posted by Tim Murray

PS--I don't get why you'd want MXM? Double-precision computation on a laptop...? Why? Unless this means that these apps won't work at all on consumer RV670s.

Embedded doesn't necessarily mean laptop is how I would interpret that.

And anyway, double or single precision, why would it being in a laptop be relevant?

Jawed

[Tim Murray]

Originally Posted by Jawed

Embedded doesn't necessarily mean laptop is how I would interpret that.

And anyway, double or single precision, why would it being in a laptop be relevant?

Jawed

It sounds like they're targeting HPC, which makes an MXM module very strange (unless they're making MXM for a 1U rack, a la the highest-end Tesla thing?). So, if they're making MXM for laptops, I don't get that--it just doesn't make sense to have an HPC part in a laptop, especially if you already have the capability to run single-precision apps with an RV670 that's already there. Now, if they're making MXM bits for a rack (so you can get 6 or so in a unit), that's a lot more interesting, and I guess that'd make sense.

[Jawed]

Originally Posted by Tim Murray

It sounds like they're targeting HPC, which makes an MXM module very strange (unless they're making MXM for a 1U rack, a la the highest-end Tesla thing?). So, if they're making MXM for laptops, I don't get that--it just doesn't make sense to have an HPC part in a laptop, especially if you already have the capability to run single-precision apps with an RV670 that's already there. Now, if they're making MXM bits for a rack (so you can get 6 or so in a unit), that's a lot more interesting, and I guess that'd make sense.

I thought about MXM for rack-mounting but then decided that "embedded" isn't the same concept as rack-mounting.

Embedded is something you deliver in a package - it might be a beefy laptop as you argue or it might be "mini-compute" type thing that operates as a desktop/deskside unit. Or something like a medical visualisation unit?

Jawed

[MfA]

What's the point in ECC? I doubt the difference in soft errors would be even close to a single order of magnitude (that GPU is a huge target, far more area reserved for actual computation than in the normal systems with ECC). If you can't deal with them ECC just provides an illusion of reliability.

[3dilettante]

Originally Posted by MfA

What's the point in ECC? I doubt the difference in soft errors would be even close to a single order of magnitude (that GPU is a huge target, far more area reserved for actual computation than in the normal systems with ECC). If you can't deal with them ECC just provides an illusion of reliability.

The ECC is for the 2 GiB of RAM.

IBM's rule of thumb is 1 bit error per month per GiB of memory.

One such card is going to have 2 errors a month.
Assuming we try to pack these babies into a compute node, it's 2-4 cards a node.
At 8 errors, a month, that is more than weekly.

A large system might have hundreds to thousands of nodes.

At a hundred nodes, the sytem is going to be hitting a silent data error in video RAM every hour.
At a thousand, the system is going to hit an error every five minutes, or would if anyone had enough faith in GPGPU to put together a system at that scale.

As for ECC on the GPU itself, I've not heard of any such measures for GPUs.
CPU and other processors have been doing that since 90nm to avoid the rising error rates inherent to smaller geometries.
Whether that is important depends on the error rates no GPU designer has disclosed.

[MfA]

Originally Posted by 3dilettante

Whether that is important depends on the error rates no GPU designer has disclosed.

You can't determine the value of ECC without making a guess at it.

PS. I don't think ECC will usually help much for logic errors.

[3dilettante]

ECC is usually used on CPU caches and parity is used on the register files.

SRAM has a higher error rate than DRAM and that CPUs need such features to keep error rates the same as process features shrink.

CPUs have had a much higher burden placed on them, since they also manage the system.

Whether GPUs need such measures, given their increasing use of cache and massive register files, is something their designers must evaluate when they push their products into new fields.