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Search: Posts Made By: 3dilettante
Forum: Console Technology 17-Apr-2014, 18:25
Replies: 377
Views: 35,597
Posted By 3dilettante
Why stop at 50%? The claim for bringing over...

Why stop at 50%?
The claim for bringing over DX12 was 100%.
Forum: 3D Architectures & Chips 16-Apr-2014, 07:20
Replies: 2,387
Views: 293,042
Posted By 3dilettante
There's a possible future where the answer to...

There's a possible future where the answer to both parts of that question is yes.
The hardware could roll out eventually across the stack so long as AMD keeps going back to the same IP well, and not...
Forum: 3D Technology & Algorithms 14-Apr-2014, 21:04
Replies: 19
Views: 1,825
Posted By 3dilettante
Adding execution ports increases complexity for...

Adding execution ports increases complexity for scheduling and instruction issue. The scheduling logic needs to be able to send out as many operations per clock simultaneously as there are ports.
A...
Forum: 3D Architectures & Chips 10-Apr-2014, 19:57
Replies: 36
Views: 3,920
Posted By 3dilettante
Hawaii 128KB per MC -> 8 x 128KB = 1MB L2 What...

Hawaii 128KB per MC -> 8 x 128KB = 1MB L2
What is the evidence of a change to the L2, aside from the L2 happening to be on the same marketing slide as ROPs?


Current APUs actually maintain the...
Forum: 3D Architectures & Chips 10-Apr-2014, 17:50
Replies: 36
Views: 3,920
Posted By 3dilettante
Can you clarify? Tahiti has 768 KB of L2, 6...

Can you clarify?
Tahiti has 768 KB of L2, 6 memory controllers, and 32 ROPs.
Hawaii has 1 MB of L2, 8 memory controllers, and 64 ROPs.
Forum: General Discussion 09-Apr-2014, 23:03
Replies: 22
Views: 926
Posted By 3dilettante
I know it worked in the end, but I still think...

I know it worked in the end, but I still think you're doing it wrong.

Congratulations.
Forum: Console Technology 09-Apr-2014, 22:08
Replies: 46
Views: 2,682
Posted By 3dilettante
It's not just inherently serial code, there's...

It's not just inherently serial code, there's also dynamic and run-time behaviors that can be intractable for compile-time analysis, or become uneconomical because extra bookkeeping and code bloat...
Forum: Console Technology 09-Apr-2014, 21:34
Replies: 46
Views: 2,682
Posted By 3dilettante
The Xenon and PPE cores were focused on being...

The Xenon and PPE cores were focused on being small, clocking high, having low complexity, and providing high vector throughput.
All the things designers use to raise IPC, wider issue, enhancements...
Forum: 3D Architectures & Chips 08-Apr-2014, 21:51
Replies: 2,387
Views: 293,042
Posted By 3dilettante
I haven't run across an update with an...

I haven't run across an update with an explanation yet, but I'm not done reading all the links.
Forum: 3D Hardware, Software & Output Devices 08-Apr-2014, 20:56
Replies: 13
Views: 694
Posted By 3dilettante
The house circuit is 120V/15A, at the low end. ...

The house circuit is 120V/15A, at the low end. Sustained load specifications have a safety margin that cuts into that for loads that last several hours.
Forum: Console Technology 08-Apr-2014, 20:52
Replies: 46
Views: 2,682
Posted By 3dilettante
Microsoft at the very least wanted an OoO core,...

Microsoft at the very least wanted an OoO core, but they didn't have the time to design and validate it.
A cheap, fast to market, and high-clock processor with high vector peak is what IBM was...
Forum: Console Technology 08-Apr-2014, 20:21
Replies: 46
Views: 2,682
Posted By 3dilettante
IPC is not a measure of bandwidth. If a system...

IPC is not a measure of bandwidth. If a system is primarily bandwidth constrained, that restriction would be considered separately, even if it is technically true that the chip will stall if it has...
Forum: 3D Hardware, Software & Output Devices 08-Apr-2014, 17:09
Replies: 13
Views: 694
Posted By 3dilettante
The recommended power ratings in the Anandtech...

The recommended power ratings in the Anandtech review for an apparently popular (relative to this market) dual-card quad-fire setup is a 1500W PSU.
If you pick a random standard household outlet in...
Forum: 3D Architectures & Chips 08-Apr-2014, 16:35
Replies: 2,387
Views: 293,042
Posted By 3dilettante
It looks like the water pump and fan run at a...

It looks like the water pump and fan run at a raised level at idle, so the noise floor is higher at low power.
Coil noise is being commented on. Perhaps AMD's engineers and QA testers all have...
Forum: Console Technology 07-Apr-2014, 23:36
Replies: 46
Views: 2,682
Posted By 3dilettante
Given the order of magnitude or more hit for pure...

Given the order of magnitude or more hit for pure software emulation, that still leaves Jaguar as insufficient.
The straightline speed just isn't there, and code that is contorted to best fit the...
Forum: Console Technology 07-Apr-2014, 22:31
Replies: 46
Views: 2,682
Posted By 3dilettante
IPC in that context is a rough overall average...

IPC in that context is a rough overall average across the range of workloads Xenon ran.
The chip still ran at 3.2 GHz, but in many workloads it spent many cycles stalled or only issuing one...
Forum: 3D Architectures & Chips 07-Apr-2014, 17:42
Replies: 1,624
Views: 226,004
Posted By 3dilettante
Even if a reviewer had an understanding of the...

Even if a reviewer had an understanding of the tech, much of what the driver is going is likely hidden without reverse-engineering some of it.

Some of the biggest gains might come from bug fixing,...
Forum: 3D Architectures & Chips 05-Apr-2014, 22:11
Replies: 1,372
Views: 180,651
Posted By 3dilettante
The exact mapping and policies for memory...

The exact mapping and policies for memory controllers are part of what I would use the words "special" and "sauce" for if I hadn't become sick of hearing that phrase over the last year.
If there as...
Forum: Console Forum 05-Apr-2014, 10:04
Replies: 59
Views: 2,061
Posted By 3dilettante
Given the significant number of games that are...

Given the significant number of games that are rolling out with the engine, I suppose the amount of work and support for the engine makes it a business in its own right.

I don't want to belabor my...
Forum: 3D Architectures & Chips 05-Apr-2014, 02:18
Replies: 1,372
Views: 180,651
Posted By 3dilettante
A rank is the set of chips that are activated...

A rank is the set of chips that are activated simultaneously by a chip select signal.
The example 2-rank 4GB DIMM from the slide would have 2GB per rank.
Forum: Console Forum 05-Apr-2014, 01:22
Replies: 59
Views: 2,061
Posted By 3dilettante
Last I saw, Repi had tweeted that the Frostbite...

Last I saw, Repi had tweeted that the Frostbite team had been split off from DICE and into its own internal studio, but that doesn't change my argument that there is no direct mapping between...
Forum: Console Technology 04-Apr-2014, 22:37
Replies: 286
Views: 13,598
Posted By 3dilettante
This is dependent on what people mean by virtual...

This is dependent on what people mean by virtual memory.
The memory protection and address translation hardware is part of the virtual memory system.

The system has to explicitly to give the game...
Forum: Console Forum 04-Apr-2014, 22:33
Replies: 59
Views: 2,061
Posted By 3dilettante
T-Mobile was actively marketing and at one point...

T-Mobile was actively marketing and at one point incentivizing Blackberry owners to trade in for competing phones.
That's an even more egregious example of hostile marketing and bad faith, even...
Forum: Console Technology 04-Apr-2014, 22:28
Replies: 342
Views: 35,944
Posted By 3dilettante
It was probably DMA Engines, also known as the...

It was probably DMA Engines, also known as the DMEs for Durango.




That would depend on how the residency is assigned and how quickly the ratio can be changed.
Swapping out pages or modifying...
Forum: Console Technology 04-Apr-2014, 22:10
Replies: 286
Views: 13,598
Posted By 3dilettante
The systems themselves do, but the game...

The systems themselves do, but the game allocation is pinned.
There is a possible exception, which is evidenced via omission for Sucker Punch's engine.
The flexible memory allocation of 500 MB may...
Showing results 1 to 25 of 500

 
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