I'm more curious about the R600's equivalents performance to the 8800 GTS. I'm looking to spend $350 soon on a graphics card, and I want the best deal. Not only am I curious if the ATI card will be quicker and/or better image quality, but I'm hoping Nvidia's prices will fall too. It's getting so close to launch, I just want to know. If it would be 4 months, then I'd just go and purchase an Nvidia card.

I find hard to believe that ATI can produce a price competitive solution (unless they don't want to make much money). The 512-bit memory bus probably can't scale down that well, nor does the huge power consumption bode well for it either. Cutting the power consumption down to reasonably levels probably means a huge hit in performance. Same with going with a 256-bit memory bus.

Wow, when will these huge power consumption rumors die. It's like G80 rumors all over again. As has been reported numerous times R600 will aparantly run just fine on 2x6pin connectors, at least on the retail boards.

It may end up being more than G80 but not that much more.

As far as I can see that 8 pin connector could be for...

1. Being able to run with only 1 connector. So you could do a 1x8 or 2x6 for the same amount of power. I'm sure people with modular power supplies would love to only have to use one connector.

2. Rumor has it you can only use the build in ATI overclocker with a 1x8 and 1x6. However, I find this a bit odd and doubtful.

3. Who knows maybe they've been blowing air up our behinds and it actually does use a gajillion watts of power. :roll:

Regards,
SB

id pay a high price if it was a big jump over g80. id be the first person in line to buy 2 of em.

Heh, thought you hated PC games ice? You know R600 will just run them faster - won't make them look any better. That's a lot of money to spend on something you don't enjoy :)

Lol good one...

There are strong rumours that the R600 mid-range parts will use a 128-bit bus, not 256. Given that they are also made on a 65nm process, they may well be significantly cheaper than the Nvidia equivalents (which are also 128-bit but made on an 80nm process).

It has also been reported numerous times that it will not. One quite persistent rumour is that the card will just function with 2x6-pin connectors, but only at stock speeds; overclocking will be disabled in the driver unless you're using an 8-pin and a 6-pin.

The "240W" power consumption figure for the retail version also refuses to go away, and, even if that's a peak power draw, it's still more than you can pull through the slot and two 6-pin connectors.

We don't know, of course; it's still too early to be definite about anything. But that's my point. :)

I've said it times and again, but the idea tends to be that 65nm is more expensive per-mm2 than 80nm. A 65nm wafer might cost you $6K, while a 80 or 90nm wafer will cost perhaps $4K to $5K. Whether it's cheaper per-transistor depends on yields.

Another aspect, of course, is that a smaller process will tend to allow for higher clocks and/or lower power dissipation, so your performance-per-transistor will also be higher. Anyway, it's definitely not that clear-cut, but you'd expect both companies to know what they're doing.

EDIT: Actually, the price gap between 65nm and 90nm apparently isn't that large. So it's still more expensive per mm2, but not dramatically so I guess. Yields will be lower too, but you'd assume that isn't too drastic right now either for low-end/mid-end chips.

I'm fairly sure the whole 240/270W numbers are just plain and simple FUD - I mean, there's even OEM models out there with 2x6pin physical connectors

It's not certain yet that those models weren't just developer boards, with lower clocks and/or smaller amount of memory.

I'm trying to understand your logic.

Bear with me while I pull numbers out my ass that may be completely unrealistic, but irregardless I'm sure you'll catch my drift.

TSMC uses 300mm (12inch) wafers, correct?

Concerning R600, Let's say you can fit 15 80nm chips on a wafer, and 20 on a 65nm wafer....which to me sounds realistic. Obviously not correct, but probably relatively in the ballpark.

If a 65nm wafer costs 10-15% more than an 80nm one (as I imagine it's closer to 10-20% rather than 50%), let's say 3k to 3.5k, and say each working R600 is worth ~$300. the yields would have to be ~20-30% worse on 65nm complete dice (counting those with shaders etc disabled for 'GT'-like SKUs) to not justify the switch, not taking into account the performance/power difference and what it's worth to AMD/ATI, as it would obviously positively effect sales in every part using it versus the competition during it's lifetime. This is even more-so important in the mid-range, where the yields are no doubt much much higher, and market larger, and therefore each complete chip more lucrative. This is not to mention that RV630 seems to be the same size as G84, and 65nm may be needed to stay competitive, even with the extra added cost.

With boatloads of respect, I keep hearing this argument, but don't understand the reasoning behind it. I cannot see how switching to 65nm could be a bad thing, other than the fact that they had to (or would have had to) go back and completely redesign the high-end chip and would have less time for manufacturing. All things considering though, and how bad the 80nm seemed to fair (huge power consumption, seemingly similar performing to G80) I see this as the better decision in both the long and short term. For mid-range, especially in ATi's case concerning their past with performance per transistor (and therefore die size) especially on their mid/low-end parts being less than nvidia, it seems to be a no-brainer.

There's a couple things wrong with this analysis. A GPU is not worth $300, but more like $100-150. Also, there's no guarantee that yields won't be dismal. A poorly conceived dieshrink could have terrible yields.

turtle, what makes you think 20-30% lower yields on a part that size is not reasonable? I guess you can make whatever assumptions you like in order to justify the feasibility of either option.

Correct. AFAIK, the costliest GPU of the last generation (R580) was in the neighbourhood of $150.

Cost (i.e what they paid TSMC)? Or price (as in what they charged AIBs)?

But then R580 is looking kinda petite, innit? Particularly if you add NVIO costs back. . .

Even more so when Crossfire with R520/R580 is still reliant on some external chips, so that's one more cost to write off.
I'm sure integrating Crossfire on-die in R600 will be much more cost-effective than adding a bunch of chips from outside sources.
RV570 was certainly an early proof of that.

20-30% yield is attrocious.

You should be getting upwards of 80-90% yield, or at the very least 60-70%. (Unless the yield falloff to larger die is worse than I guestimate)

A 300mm wafer should get you about 500 parts of 150mm2, with somewhere around 300-400 of which are 'good'.

With wafers costing $6K-ish(using Arun's numbers), that puts die cost at about $15-ish. Packaging & test probably a few more dollars(depending on how expensive flip chip packaging is), providing a cost of goods at about $20-ish.

The latter.
Yeah, looks like an SKU for the performance range.

Well, not realistic really, about one order of magnitude too low. At 400mm2 in 80nm, you'd get ~150 dies, not 15. And assuming perfect scaling, that'd give you ~220 dies in 65nm. :wink:

It really all depends about the time of introducing a new chip: the price per wafer (ppw) goes down significantly over the lifetime of a process. The curve starts with a high relatively flat plateau (~early adopter stage), but then starts to come down hard and keeps on going down for quite a while. It was like that for all technologies up to 130nm. It has to be the same for 110nm and below. As more fabs learn the specifics of a particular process, competition drives prices down. That's one.

In addition, the defect density (D0) also goes down steadily over the life of the process, until it bottoms out at some point. So in the early life of a process, your yield won't be great, but give it a year or two and it can be spectacular: so good, in fact, that for small chips it becomes more costly to test them before packaging! That's two.

Those 2 factors have to be multiplied to determine the final outcome. If you're going to introduce a new chip when ppw and D0 is still high and your competitor is riding the downward slopes, you're in for trouble.

So Arun is right: releasing a chip in a smaller process too soon can result in dramatically higher prices than those for chips with similar functionality in larger processes. But once D0 and ppw start coming down at the same time, the price curves intersect quickly and the smaller process wins.

I have seen it happen in the telecom world that chips were deliberately delayed to avoid this effect...

Another point: the price per wafer is essentially determined by the fab. They are using complex models to come up with reasonable prices. Companies with their own fab can and will use different pricing models because owning a fab requires entirely different accounting optimizations (wrt depreciation, tax credits and what not.) So introducing a product too soon at a smaller process can be harmful for a fabless company, but may be good for those that have one (e.g. because the fab would otherwise be running at too low capacity.)

Now the big question: where on the D0 and ppw curves are we at this point for 80nm and 65nm processes and is a 65nm R600 cheaper than the 80nm version?

I don't know. And neither does anyone of us. And those who do know won't reveal those closely guarded trade secrets. So the discussion ends right there. :wink:

There was a report (I think from eetimes) that stated yields for 65nm right now were pretty bad. If someone could find that report, I would be very grateful.

Report or Rumor? Big difference there.

Report. You can check Arun's post history for the link. Its buried in there. ;)

(I'm lazy to look it up because I have to hit the sack now, I hate Mondays :mad: )

I remember that article. That was the one that said how Intel was one of the few that was having good 65nm yields. Wasn't that a few months ago? Who knows what may have changed. It was also very non-specific. It gave neither numbers nor a ballpark estimate suggesting what "bad yields" were. Hardly anything to base assumptions on.

Their idea of bad yields may also not have factored in that you can disable portions of defective chips and sell them as cut down models, as AMD/ATI will surely do. Sure, you may only get 50% yields on your best chip, which sounds terribly wasteful and expensive, but perhaps you can still sell 70% of what you manufacture via disabled pipes et al. Suddenly 50% doesn't sound so bad anymore.

Or, on the other hand, they could have meant that manufacturers are typically getting 30% yields and AMD/ATI can only manage to salvage 42% of their total output for sales. There's nothing to indicate that it's one way or the other.

Yes, that's why using 'yield' as a metric is about as useful to describe the quality of a process as 'mips' is for the quality of a CPU. (Or worse, actually). 'Defect density' is much more precise. Yield is useful to compare specific chips, but that's clearly not what EET was talking about...

Probably too much of a nuance for certain types of journalists...

Nuanced is certain. My concern is that they COULD have been talking about overall chip yields, which does bode poorly for firms using a 65nm process, but they could also not have been. Their statement that yields are bad is about as good of a metric as me saying "65nm yields are probably not so great because it's fairly new" is. It gives absolutely no information as to what or why.