del42sa's latest activity

https://www.chiphell.com/thread-2597390-1-1.html

Is the reason we're discussing RDNA 3.5 in the RDNA 4 speculation thread because RDNA 4 is that far out? Isn't the idea that 3.5 is an...

Let's just hope that this will be a different kaboom to the one we've seen on RDNA3 launch for a change.

https://wccftech.com/jim-keller-criticizes-nvidia-blackwell-10-billion-rnd-cost-says-achievable-in-1-billion-usd/ Jim Keller Criticizes...

I think the issue is that the 7900 XTX BOM should put it between the 4080 and 4090, yet it is barely faster than the 4080 in...

yes, but even if Strix would magically clock 3,5 Ghz with lower voltage, it won´t change RDNA3 GPU fate as it´ obvious now, AMD not...

Yes, let us all be asking people riding horses if they want automobiles or not.

https://wccftech.com/amd-strix-point-apus-rdna-3-igpu-match-rx-6400-with-12-cus-rtx-3050-with-16-cus/

Trying to extrapolate GPU performance scaling from CPU performance scaling makes absolutely no sense at all. And it makes even less...

Perf per transistor seems like a pretty fragile metric. It doesn't account for power, transistor type (cache vs logic vs IO), off-chip...

I'd call it very close to outlandish, if the 'not outlandish' take requires you to believe that this modern Radeon group is about to...

Well the funny Navi4's were indeed 3d and funny! SoIC isn't mainstream-viable just yet tho. this is the AMD bad forum, don't. just...

Medusa is X-Box APU , right ?

no, it doesn't make any sense within cost sensitive products. You may put 3D cache on some Halo product or high-end variant of GPU, but...

navi 32 has total 346mm2 of die area, GCD has ~ 200mm2 and rest 146mm2 of MCD , so 32CU would probably fit the same size on 4nm, but I...